[논리설계] 08. Tranmission Gates, Pesudo-nMOS Gates, Power Consumption

1. CMOS Gate Structure

2. NOR Gate

-How do you build a three-input NOR gate?

NOR Gate

 

How do you build a two-input AND gate?

3. Transmission Gates

1) nMOS pass 1's poorly

2) pMOS pass 0's poorly

3) Transmission gate is a btter swtich

 -passes both 0 and 1 well

4) When EN =1, the switch is ON: EN =0 and A is connected to B

5) When EN =0, the switch is OFF: A is not connected to B

 

4. Pesudo-nMOS Gates

1) Replace pull-up network with weak pMOD transistor that is always on 

2) pMOS transistor: pulls output HIGH only when nMOS network not pulling it LOW

 

ex) Pseudo-nMOS NOR4

5. Gordon Moore, 1929-

1) Cofounded Intel in 1968 with Robert Noyce.

2) Moore's Law: number of transistors on a computer of transistors on a omputer chip doubles every year(observed in 1965)

3) Since 1975, transistor counts have doubled every two years.

 

6. Power Consumption

1) Power =Energy consumed per unit time

 -Dynamic power consumption

칩이 작동할 때만 Power consumption이 발생하는 것

 -Static power consumption

아무것도 하지 않아도 Power consumption이 발생, leakage power라고도 한다.

 

2) Dynamic Power Consumption

 > Power to charge transistor gate capacitances

 -Energey required to charge a capacitance, C, to VDD is CVDD^2

 -Circuit running at grequency f. transistors swich (from 1 to 0 or vice versa) at that frequency

 -Capacitor is charged f/2 times per second (discharging from 1 to 0 is free)

>Dynamic power consumption:

 

*capacity는 회로 사이즈와 비례

*f=frequency, how often they works

 

3) Static Power Consumption

 >Power consumed when no gates are switching

 >Caused by the quiescent supply current, IDD(also called the leakage current)

 >Static power conumption:

 

4) Power Consumption Example

> Estimate the power consumption of a wireless handheld computer

 -VDD=1.2V

 -C=20nF

 -f=1GHz

 -IDD= 20mA